Wednesday, August 8, 2007
Wednesday afternoons are supposed to be free. I end school at 1pm and I'l free for the rest of the day. But today was different. I stayed in school to design some stupid circuit.
It took me a good 3 HOURS to design the whole circuit, ON PAPER. I still havta patch this stupid components onto the veroboard. Then after that, I still havta soulder the entire circuit. It will take me some one and a half or even two days to complete the entire project.
You know what? This project's weightage is higher than my term test! Term test weightage's only 10% while this is 20%. Gee... guess I'll just havta get this done and over with.
My circuit's design:

It may look easy. But NO way was it easy and NO way was it even near easy. 3 hours you know, 3 hours! Oh yes. This paper has not been checked by my lecturer. So should the circuit be designed or patched wrongly and I'm not able to get the desired signal, may God Bless me (so that I can at least pass) and the TSO (she has to pluck the electrodes to her body to test for the signal).
Anw, all I ask for this subject is to pass. If i fail this subject, trust me, I'll go bonkers!
Ah Neh
bounced.
...